The present invention relates to a semiconductor device and a manufacturing method thereof. In particular, the invention relates to a technology effective when applied to a semiconductor device having a nonvolatile memory comprised of a memory cell having a MONOS (Metal Oxide Nitride Oxide Semiconductor) structure with a nitride film as a charge storage layer and also to the manufacture of the semiconductor device.
For example, Japanese Patent Laid-Open No. 2003-309193 (Patent Document 1) describes a nonvolatile memory cell transistor having a first gate electrode (control gate electrode) and a second gate electrode (memory gate electrode) placed adjacent to the first gate electrode via an insulating film and a charge storage region. In the structure of the memory cell transistor, the height of the first gate electrode from the substrate surface is made lower than the height of the second gate electrode from the substrate surface or the height, from the substrate surface, of the gate electrode of a transistor formed in a peripheral circuit.
For example, Japanese Patent Laid-Open No. 2002-231829 (Patent Document 2) discloses a nonvolatile memory cell having a select gate electrode and a control gate electrode formed as a sidewall via a gate insulating film over the side surface of the select gate electrode. The control gate electrode and select gate electrode have a predetermined difference in height.    [Patent Document 1] Japanese Patent Laid-Open No. 2003-309193    [Patent Document 2] Japanese Patent Laid-Open No. 2002-231829